Saturday, December 09, 2006

The Serial Digital Medal PCB Layout

I've also finished the PCB layout for the circuit. I want to fuss over it a bit more, because 5 prototypes boards run me about $95 . Thus any mistake is an expensive one. I'm still kicking myself for the too-small hole sizes from the very first version of the board.

However, the last layout took about a week and a half of work to get it 100% routed to where I was happy. This board auto-routed fully on the second placement attempt. I still needed to do some manual re-routing but nothing too serious. Plus, all the normal lines are 10 mil and the power lines are 15 mil. Each chip has its own 0.1uF anti-noise cap to boot. I'm hopeful the intermittent noise and dust problems of the past will be gone from this design. I'll still probably get it a good solid flux cleaner bath though.

Chances are I'll put PCB layout in today or Monday. I kinda wish I could have them for tomorrows meeting, but that meeting is going to be busy anyway and I absolutely don't wont to rush this. Rushing was a big factor in all the mistakes of the previous version of the medal.

This is starting to get exciting again!

No comments: